In a continuing effort to increase performance MOSFET devices have been fabricated using strained channel regions located in portions of a semiconductor substrate. Strained channel regions allow enhanced carrier mobility to be realized, thereby resulting in increased performance when used for N channel (NMOSFET) or for P channel (PMOSFET) devices. The use of semiconductor alloy layers, such as silicon-germanium or silicon-germanium-carbon, followed by an overlying thin semiconductor layer can result in the overlying semiconductor layer having the desired strain component needed for carrier mobility enhancement. Thus, a strained semiconductor layer overlying a semiconductor alloy layer, underlying a gate structure and surrounded by adjacent source/drain regions, can be used as an attractive configuration for MOSFET devices.
This configuration can, however, be difficult to process in addition to presenting junction leakage concerns as a result of the blanket semiconductor alloy layer. The epitaxial growth of the semiconductor alloy layer, such as a silicon-germanium layer, can be costly and difficult to accurately control the level of germanium in the epitaxially grown semiconductor alloy layer. In addition, the presence of a blanket semiconductor alloy layer allows an unwanted interface between the source/drain regions to exist, possibly introducing junction leakage.
Embodiments of the present invention provide a strained channel region for MOSFET, or for complimentary (CMOS) devices, wherein a silicon-germanium region will be formed in a channel region, while reducing or eliminating junction leakage that can result when a blanket silicon-germanium region directly interfaces between source/drain regions. Embodiments of the present invention may also feature a process sequence that allows integration of the process steps used for formation of the semiconductor alloy region and for formation of the MOSFET lightly doped source/drain (LDD) region.